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HCL Technologies

gTESTER-100 - Tester for Analog and Digital PWAs

The GTESTER-100 is the ultimate in analog/digital PWA functional test devices with features that are only found in high-end Automated Test Equipment (ATE) systems held by defense consulting firms. It offers Card Edge functional testing and Boundary Scan testing for PWAs with JTAG compatible chips. Custom/third party software can also be used for testing, and guided probe back tracking.

The GTESTER-100 covers the functional test scenario (end-to-end requirements-based functional testing which is very relevant to the aerospace industry where certification depends on the requirements being covered a hundred percent). To support functional testing, the product requires the ability to change all inputs simultaneously (both in normal and in abnormal conditions), simulating the environment in which the electronic module (the unit under test) works with reference to all parameters.

The GTESTER 100 has a direct control architecture implementation where command from host through com port (or manual commands from the control panel) is received along with outputs from the unit under test, and provides inputs to Unit Under Test (UUT) dynamically using simulation logic implemented within.

A direct implementation using a single HW module simplifies the design and provides compactness and cost advantages. Further VHDL-based simulation ensures a high level of flexibility and removes restrictions and delays caused by BUS communication.

GTESTER 100 can be directly interfaced to the PC using the serial port - hence freedom from obsolescence of PC interfaces and hardware.

  • 16 AO and 16 AI channels.(+/-5 volts)
  • 17 manual inputs
  • 45 mode selection switches
  • 23 channel visual output monitoring (LED)
  • 200 channel monitoring points
  • Automatic mode (with PC host using serial link)
  • Unlimited number of virtual test pins for contact-less testing using boundary scan test
  • Programmable Time base or special pulse train generation from 20ns (50MHz) to 1 sec in steps of 20 nanoseconds
  • Card Edge functional test for Analog / Digital PWAs
  • Programmable Digital Simulator

The GTESTER 100 has been successfully used for testing complex digital PWBs (containing multiple DSPs and multi-million gate FPGAs)

gtester by HCL Tech

IP Uniqueness

  • Ability to configure digital inputs to PWA under test, depending on the specific requirements of the PWA (e.g. if the PWA is a controller circuit, the response feedback from the controlled system can be accurately modeled and fed to the PWA enabling realistic functional testing). This flexibility is provided using VHDL-based programmable digital I/O
  • Higher level of integration enables compact design
  • Modular integrated design allows for easy customization
  • Future-proof designing by using programmable devices that can be easily replaced with a future version device and generic communication protocols like the serial port
  • Optimized design to provide acceptable no-frills performance at affordable price
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