Qualification Required:

• Typically requires minimum of 5 years of experience in SI/PI Background
• Bachelors OR Master’s Degree Engineering in Electronics

Roles And Responsibilities

• Performs Transmission line & Via modelling and carry out experiments to validate modelling outcomes and methodologies.
• Should be able to analyze and review the layout files related to Signal integrity and Power Integrity problems.
• Should be able to provide practical solutions to PCB/Package design team based on simulation results and analysis.
• Conducting Simulation of memory interfaces for Board and Package and High Speed Serial IO interfaces for Board and Package.
• Perform decoupling capacitor optimization, Loop inductance analysis

Required Technical And Professional Expertise:

• Strong knowledge in Signal Integrity and Power Integrity fundamental concepts.
• Strong experience in Package and PCB modelling is required.
• Deep Understanding of S-parameter & its modelling concepts for Single ended and differential interfaces.
• Experience in simulating (FD/TD) memory interfaces for Board and Package is required (DDR4/LPDDR4)
• Experience in simulating (FD/TD) High Speed Serial IO interfaces for Board and Package is required (PCIe Gen3/4, SATA Gen3, USB3/3.1 and Display Interfaces etc.)
• Good knowledge of Power Delivery Network, impedance profile analysis, IR Drop Analysis, and time domain Analysis.
• Experience in extracting the PDN model of package and PCB power rails and perform decoupling capacitor optimization, Loop inductance analysis.
• Strong knowledge in simulation tools specifically Hspice, Sigrity (2.5D and 3D-EM Must), ADS and other tools like Ansys SIwave, HFSS 3D.