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Design-for-Testability: The new strategic imperatives for the semiconductor industry
Vijayaprabhuvel Rajavel, Technical Architect and Engineering Program Manager at HCLTech, explains how design-for-testability (DFT) and robust testing are core to silicon reliability and customer trust
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Design-for-Testability: The new strategic imperatives for the semiconductor industry
Vijayaprabhuvel Rajavel, Technical Architect and Engineering Program Manager at HCLTech, explains how design-for-testability (DFT) and robust testing are core to silicon reliability and customer trust
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AI‑driven roadmap to autonomous manufacturing
Shantanu Rai, VP and Head of Digital Manufacturing, Engineering and R&D Services at HCLTech, outlines how engineering foundations, converged data and human‑led AI enable autonomous manufacturing
Inside the AI Lounge: Learn why the HCLTech pavilion is where AI meets ROI
Learn how our AI Lounge showcases real-world value creation, physical AI and robotics exhibits and industry-aligned business impact from AI for the G2000 enterprises.
#HCLTechAtDavos preview | Learn about our programming at #WEF26
Go behind the scenes of our panels, roundtables and fireside chats on AI, innovation and growth featuring global industry leaders in Davos on the sidelines of WEF 2026 Annual Meeting.
At MWC 2026, HCLTech explores how AI-native transformation, silicon innovation and ecosystem partnerships are reshaping the future of telecom, media and technology
As AI becomes more autonomous and agentic, enterprises must balance ROI, trust and adoption by redesigning systems where people and AI learn and operate together
As AI demand reshapes compute economics, chip teams are rethinking architectures, tooling and security to deliver performance, predictability and adoption at scale
At the India AI Impact Summit 2026, HCLTech CEO and Managing Director, C Vijayakumar addressed concerns about market erosion, margin compression and the so-called SaaS apocalypse