Memory Design Engineer | HCLTech
The Digital Path Forward

Memory Design Engineer

Qualification Required:

  • Typically requires minimum of 2-13+ years of experience in Memory Design with mainstream SRAM tools
  • Bachelors / Master Degree in E&E and E&C
  • Strong communication and team work skills

Roles And Responsibilities

  • Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations.
  • Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.
  • Good experience in design verification: Sense amplifier analysis, self-time analysis and marginality analysis.
  • Good exposure to validation of the characterized data.
  • Strong knowledge of physical implementation impact on circuit performance.
  • Experience with the most advanced technology nodes up to 28nm and below.  

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