Instruction Set Architecture (ISA) is an important communication line between the OS and the CPU. The most popular ISAs are CISC (Complex Instruction Set Computing) and RISC (Reduced Instruction Set Computing). CISC has the ability to execute more applications in a single instruction cycle, while RISC is simpler.
Intel/AMD x86/x64 are CISC based, and ARM is RISC based. Until now, both of them had identified their niche and were comfortable operating in it. The x86/x64 is used in laptops/servers/desktops and ARM is more suited for mobiles and tablets. But off late, things have started changing; Apple using ARM for their laptops and desktop is a game-changer and introduces a whole new dimension to RISC. This brings us to the obvious question, will ARM replace x86/x64? The answer is, maybe and sooner than we think [8]. But wait a minute, there is another instruction set architecture growing strong from its infancy, RISC-V; now, will this replace both CISC and RISC? I think yes, RISC-V will replace the traditional dominant players.
RISC-V [1]: It’s an ISA developed under reduced instruction set computing principles and provided as an open-source license with no fee – this is the most attractive feature of RISC-V. Many manufacturers have welcomed it as this may help them get rid of high cost and royalty fees associated with proprietary ISAs. It has a small piece of standard fixed ISA and allows modular extensions, which could be customized based on applications. It is well defined for 32-bit, 64-bit and future-proofed for 128-bit, and suitable for most applications – from microcontrollers to supercomputers [10]. Due to its open-source nature, it also enjoys leverage against any existing/new country-based export restrictions. This makes it more favorable in geopolitical tensions despite its small online community.
RISC-V standards are controlled by RISC-V International, which is a global non-profit association based in Switzerland. Founded in 2015 as the RISC-V Foundation with 29 members, today, RISC-V has more than 1000 members in 70+ countries. RISC-V was rebranded and incorporated in Switzerland in 2020 [2].
Members of RISC-V Foundation. Source: Circuit Digest
We have passed multiple decades where ARM and x86 dominated the processor industry with everything running on them. This created a bottleneck for the OEMs, forcing them to adapt to the chip features rather than having something customized for their product needs. This is a key factor that contributes to the consideration and adoption of RISC-V based processors across OEMs.
Growing limitations on Moore’s law has also paved the way for the RISC-V market as demand for higher performance continues to grow.
Security is another aspect that is making RISC-V attractive. It gives flexibility to the OEMs to build their own security features into the processor, which otherwise was locked. Also, there isn’t a way to know if spyware or malicious code has been embedded at the BIOS level of a chip by the chipmaker. RISC-V enables the view of RTL-level source code, thereby making it more transparent and trustworthy thus making it highly attractive for ADAS, military and space applications too.
It’s believed by experts that RISC-V may pose the risk of industry fragmentation, which could cause portability issues, but this is being taken care of by RISC-V Foundation through interoperable collaborative standards and protocols. RISC-V organization is also addressing other gaps like insufficient testing tools, standards and performance benchmarking [13]. We may see significant updates in this space in the coming years or perhaps months.
In recent years, RISC-V has advanced to RV64, multi-heart CPUs, vectors, hypervisors, AI/IoT SoCs, Linux drivers, RTOS, AI compilers etc. Their early members have laid out a bright roadmap for RISC-V with their ongoing research and development – Andes’ superscalar multicore and L2 cache controller processors, StarFive’s RISC-V AI visual processing platform, SiFive’s development board for RISC-V personal computers, Micro Magic’s 64-bit RISC-V core, and GreenWaves’ ultra-low power GAP9 hearables platform enabling scene-aware and neural network-based noise reduction. Microchip has also released first SoC FPGA development kit based on RISC-V, and in the HPC space, Cortus added HPC core as part of Barcelona Supercomputer Program with the strong backing of European consortium [9][11][12][13][14].
We can also see an increasing adoption by OEMs. Samsung taped out its first chip with RISC-V core in 2017. It also used RISC-V cores in its 2020 5G smartphones. Most recently, they partnered with SiFive to develop AI and ML inference and training SoCs on RISC-V core for their 14nm technology node. Western Digital is adopting RISC-V for SSD and HDD controllers and Seagate for their hard disk drive controller. Nvidia will use it for its GPU memory controllers and Qualcomm for its mobile SoCs. Intel will adopt RISC-V to accelerate its foundry business which plans to manufacture chips for other companies – x86/ARM/RISC-V based. Alibaba has developed the XuanTie 910 processor based on the RISC-V architecture targeted for cloud and edge servers.
Further, Semico Research Corp [3] predicts the market will consume a total of 62.4 billion RISC-V CPU cores by 2025, with the industrial sector forecasted to be the largest segment with 16.7 billion cores.
Summary
Experts do believe it may not replace RISC, but will continue to emerge as an industry standard. Several universities [4] are developing materials and instructions for the design, engineering, and use of RISC-V. This indicates a positive outlook for RISC-V adoption in the future. With its low cost, RISC-V will attract smaller companies to have a play in this space which is largely dominated by larger companies. Also, ARM’s response to this competition by opening up custom instruction in Cortex designs and architecture is further proof that the threat is real!
As per Michael Taylor [4], an associate professor in the School of Computer Science and Engineering at the University of Washington in Seattle, "There are no serious technical or practical issues with RISC-V. It will eventually supplant x86 and ARM as the primary instruction set for microprocessors. It will fundamentally change the computing world."
The RISC-V organization [5] currently has about one-third of its members in North America, another third in Europe, and 37 per cent in the Asia-Pacific region. Asia-Pacific has the fastest growth in RISC-V architecture adoption, with countries like India and Pakistan having RISC-V based national instruction set architecture for homegrown chip development. Apart from this, the US government is also invested in RISC-V for their military programs through Defense Advance Research Project Agency (DARPA).
We can’t deny the trend where the market wants more open interoperable systems than proprietary closed systems. And hence, the processor world is mimicking the 5G world. So RISC-V is here to stay, and in all likelihood, replace its predecessors!!
References:
[2] About RISC-V - RISC-V International (riscv.org)
[3 ] Semico Forecasts Strong Growth for RISC-V - RISC-V International (riscv.org)
[4] Will RISC-V Revolutionize Computing? | May 2020 | Communications of the ACM
[5] RISC-V Star Rises Among Chip Developers Worldwide - IEEE Spectrum
[6] SiFive and Samsung Foundry Extend Partnership to Accelerate AI SoC Development - SiFive
[8] The Linley Group - SiPearl Develops Arm HPC Chip
[9] Cortus Develops Next Generation High-End RISC-V CPU Core for HPC - Cortus
[10] Cortus Develops Next Generation High-end RISC-V CPU Core for HPC (hpcwire.com)
[11] Andes Announces New RISC-V Processors: Superscalar (globenewswire.com)
[12] SiFive Performance P550 Core Sets New Standard as Highest Performance RISC-V Processor IP - SiFive
[13] RISC-V is growing and offers stability, scalability and security (microcontrollertips.com)
[14] https://riscv.org/wp-content/uploads/2021/05/RISC-V-Member-Benefits-and-Welcome.pptx
